- bit-serial architecture
- разрядно-последовательная [бит-последовательная] архитектура
English-Russian dictionary of computer science and programming. 2013.
bit-serial architecture
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Bit-serial — Digital Architecture=IntroductionIn digital logic applications, Bit Serial architectures are direct contrast to Bit Parallel where a data word tends to be a one to one function of the system clock signal. A Bit Serial architecture processes a… … Wikipedia
Serial ATA — SATA redirects here. For other uses, see SATA (disambiguation). Serial ATA (SATA) From top to bottom, SATA Certification Logo, SATA cable, and two first generation (1.5 Gbit/s) SATA data connectors on a … Wikipedia
serial communications — The transmission of information from computer to computer or from computer to peripheral device one bit at a time. Serial communications can be synchronous and controlled by a clock, or they can be asynchronous and coordinated by start and… … Dictionary of networking
Industry Standard Architecture — For other uses of ISA , see Isa (disambiguation). ISA Industry Standard Architecture Five 16 bit and one 8 bit ISA slots on a motherboard Year created 1981 Created by … Wikipedia
List of device bit rates — This is a list of device bit rates, or physical layer information rates, net bit rates, useful bit rates, peak bit rates or digital bandwidth capacity, at which digital interfaces of computer peripheral equipment and network devices can… … Wikipedia
Micro Channel architecture — MCA Micro Channel architecture 32 bit Graphics Card IBM XGA 2 Year created 1987 Created by IBM Supersedes ISA … Wikipedia
MIPS architecture — MIPS (originally an acronym for Microprocessor without Interlocked Pipeline Stages) is a RISC microprocessor architecture developed by MIPS Technologies. As of|1999|alt=By the late 1990s it was estimated that one in three RISC chips produced were … Wikipedia
CompactPCI Serial — is a new industrial standard for modular computer systems. It is based on the established PICMG 2.0 CompactPCI standard[1], which uses the parallel PCI bus for communication among a system s card components. In contrast to this, CompactPCI Serial … Wikipedia
Extended Industry Standard Architecture — Infobox Computer Hardware Bus name = EISA fullname = Enhanced Industry Standard Architecture caption = Three EISA Slots. invent date = 1988 invent name = Gang of Nine super name = PCI super date = 1993 width = 32 numdev = 1 per slot speed = 8.33… … Wikipedia
Atari 8-bit family — The Atari 8 bit family is a series of 8 bit home computers manufactured from 1979 to 1992. All are based on the MOS Technology 6502 CPU and were the first home computers designed with custom coprocessor chips, giving them the most powerful… … Wikipedia
Super Harvard Architecture Single-Chip Computer — The Super Harvard Architecture Single Chip Computer (SHARC) is a high performance floating point and fixed point DSP from Analog Devices,not to be confused with Hitachi s SuperH (SH) microprocessor. SHARC is used in a variety of signal processing … Wikipedia
